Power and cooling for large-scale computing systems are rapidly becoming unmanageable problems for the enterprises which depend on them. A computer based on superconducting logic and cryogenic memory shows high promise for alleviating these problems. The C3 program will develop a prototype superconducting computer with the goal of learning whether such a computer could be economically scaled to useful size. The talk will review the one-year-old C3 program, accomplishments and challenges.

We have successfully demonstrated high-speed operation of rapid single-flux-quantum (RSFQ) bit-serial microprocessors at around 100 GHz. We employed a bit-serial processing, which was a suitable approach for RSFQ circuits to achieve highest clock frequencies using minimum hardware and power, i.e., to maximize energy efficiency. The 100-GHz RSFQ microprocessors are expected to compete with commercial CMOS ones.

In this study, we have developed a new niobium junction process featuring a critical current density increased to 20 kA/cm². The 1σ-spreads of about 2% in critical currents were obtained even for the minimum junctions (0.8 μm in diameter, 100 μA), which were sufficiently small to realize large-scale RSFQ circuits.

We designed circuits with extreme care in a sub-picosecond order. We optimized bias voltages (Vb) and McCumber-Stewart parameters of junctions (βc), balancing power consumption, margins, stability, and integration density. In the datapath, we increased Vb and βc to 5.0 mV and 2.0, respectively for ultrafast operation. In addition, we changed βc to 4.0 locally for exclusive OR gates and for critical paths such as feedback loops, in order to enlarge timing margins. In the control unit, we decreased Vb and βc to 0.5 mV and 1.4, respectively for reducing power consumption. The circuit parameters were re-optimized for the given Vb and βc. To reduce any timing jitters due to fabrication and noise, layout around junctions were designed almost identically to control parasitic inductances, and floor planning were meticulously done to minimize racing conditions between clock and data paths.

We fabricated 8-bit, simple microprocessors with seven instructions. The total number of junctions, estimated power and performance were 3073, 1.02 mW, and 800 million instructions per second, respectively. We verified correctness of all the operations using on-chip high-speed tests.

This work was supported by JST-ALCA, KAKENHI (24760276) and VDEC of the University of Tokyo, in collaboration with Cadence Design Systems, Inc. The circuits were fabricated in the clean room for analog-digital superconductivity (CRAVITY) of AIST.

Since the first demonstration of quantum coherence with the Cooper pair box circuit¹ in 1999, superconducting quantum bit circuits have progressed very significantly². However, the development of processors performing the unitary evolution of a qubit register still faces unsolved challenges, and present-day processors are only able to address very elementary cases of quantum algorithms³ or protocols. I will report the results obtained in the Quantronics group on qubit register readout⁴ and on hybrid circuits incorporating spin ensembles⁵, and I will review the state of the art of superconducting processors and the solutions envisioned⁶ for solving the coherence, error correction, and scalability issues. I will also discuss the status of the adiabatic quantum computing route towards quantum information processing⁷.

¹ Y. Nakamura, Yu. A. Pashkin, and J. S. Tsai1, Nature 398, 786 (1999).
² D. Vion et al., Science 296, 886 (2002) ; J. Koch et al., Phys. Rev. A 76, 042319 (2007); Hanhee Paik et al., Phys. Rev. Lett. 107, 240501 (2011).
³ E. Lucero et al., Nature Physics 8, 719-723 (2012); A. Dewes et al., , Phys. Rev. B 85, 140503 (2012).
⁴ V. Schmitt et al . Phys. Rev. A90, 062333 (2014).
⁵ C. Grezes et al ., Phys. Rev. X 4, 021049 (2014).
⁶ A.G. Fowler et al., Phys. Rev. A 86, 032324 (2012); Mazyar Mirrahimi et al , New J. Phys. 16 045014 (2014)
⁷ T.F. Ronnow, Science 345, 420 (2014).

Cryogenics is an enabling technology for any superconducting application.
We will briefly review the specifications in terms of operation temperature and cooling power for superconducting electronics.
We will summarize the state of the art and developments of cryorefrigerators capable of such specifications.
The thermal integration between the cryorefrigerator and the superconducting device is a major concern for an optimized system. Some examples of integration in the case of superconducting electronics will be presented and discussed with a specific insight on the new challenge of emerging superconducting computing.